SPARC systems

On a SPARC system, an interrupt is treated just like any other trap condition. The CPU will automatically execute a special trap sequence, based on the interrupt's priority level. The hardware will stuff a unique code into the Trap Base Register, which provides an address in kernel space. This is immediately used as the PC value for the next instruction. Interrupt- and trap-handling routines are invariably written in assembly language, although they may call C functions once the correct environment has been set up. These routines (both C and assembly) are generally given names reflecting the priority level of the interrupt that invoked them or the device they are intended to service. The C functions themselves are usually short and are not supposed to do much other than alert some other routine about a special event. Since they are I/O- related , they normally appear in device driver code. This means, of course, that they are part of the kernel and operate with all the rights and privileges pertaining thereto (and all the responsibilities).