RISC Architecture

   

PA-RISC, as its name implies, is a RISC, or Reduced Instruction Set Computer, architecture. But there is more to RISC than just a smaller instruction set. There are several characteristics that are common to all RISC architectures, including PA-RISC, that make these systems fast and easy to implement. Among these are:

  • Fixed instruction size All instructions are 32 bits wide.

  • Small number of addressing modes PA-RISC has only three methods of specifying a memory address.

  • Simplified memory access The only instructions that access memory are explicit loads and stores. Computational operations are done between registers.

These characteristics make for a fast, simple hardware implementation. Performance gains can then be accomplished through pipelining of instructions and through optimizing of code by compilers.

The PA-RISC architecture also has many features not normally associated with RISC. The instruction set, while smaller than older CISC architectures, has many instructions designed specifically to streamline commonly executed sequences of instructions. In addition, the hardware is designed to speed up typically expensive instructions such as bit operations.



HP-UX 11i Internals
HP-UX 11i Internals
ISBN: 0130328618
EAN: 2147483647
Year: 2006
Pages: 167

flylib.com © 2008-2017.
If you may any questions please contact us: flylib@qtcs.net