Learning Check

1:

What is bus width?

1. The number of bus cycles that occur per second

2. The number of electrical lines in a bus

3. The process used to transfer data

4. The amount of data that can flow across a bus during a period of time

2:

Over what system bus are control signals usually sent?

3:

What is the formula for maximum transfer rate of a bus?

1. (Speed x Width)/Clock cycles per transfer

2. (Speed x Clock cycles per bus cycle)/Width

3. (Width x Clock cycles per bus cycle)/Speed

4. Speed/(Clock cycles per bus cycle x Width)

4:

What are four fundamental adjustments that can improve system performance?

5:

What is a bus master device?

6:

How many expansion slots operating at 66MHz can a PCI-X bus segment support?

7:

How long does PCI-X allow for the decode logic to occur?

8:

Match the following terms and descriptions:

PCI Express	Incorporates error checking and correcting
PCI-X 2.0	Defines a packetized protocol and a load/store architecture
USB	Enables you to hot plug peripheral devices without restarting or reconfiguring the system