7.6 References


7.6 References

  1. Momose, H. S., Morifuji, F., Yoshitomi, T., Ohguro, T., Saito, M., Morimoto, T., Katsuma, Y. and Iwai, H.: ‘High frequency AC characteristics of 1.5 nm gate oxide MOSFETs’. Proceedings of IEEE International Electron Device Meeting (IEDM) San Francisco, CA, USA, Dec. 1996, pp. 105–08

  2. Tsang, T. K. K. and El-Gamal, M. N.: ‘Gain controllable very low voltage (1 V) 8–9 GHz integrated CMOS LNA's'. Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Technical Papers, Seattle, WA, USA. IEEE, Jun. 2002, pp. 205–08

  3. Tsang, T. K. K. and El-Gamal, M. N.: ‘Gain and frequency controllable sub-1 V 5.8 GHz CMOS LNA’. Proceedings IEEE International Symposium on Circuits and Systems (ISCAS), Arizona, USA, May 2002, pp. 795–98

  4. Leroux, P. and Steyaert, M.: ‘High-performance 5.2 GHz LNA with onchip inductor to provide ESD protection’, Electronic Letters, Mar. 2001, 37 (7), pp. 467–68

  5. Mostafa, A. H. and El-Gamal, M. N.: ‘A CMOS VCO architecture suitable for sub-1 volt high-frequency (8.7–10 GHz) RF applications’. IEEE International Symposium on Low Power Electronics and Design (ISLPED), Huntington Beach, CA, USA, Aug. 2001, pp. 247–50

  6. Mostafa, A. H. and El-Gamal, M. N.: ‘A sub-1V 4 GHz CMOS VCO and a 12.5 GHz oscillator for low-voltage and super-high frequency applications’, IEEE Transactions on Circuits and Systems II (TCAS II), Oct. 2001, 48 (10), pp. 919–26

  7. Mostafa, A. H. and El-Gamal, M. N.: ‘A fully integrated sub-1 V 4 GHz CMOS VCO, and a 10.5 GHz oscillator'. 26th European Solid-State Circuits Conference (ESSCIRC), Stockholm, Sweden, IEEE, Sept. 2000, pp. 312–15

  8. De Ranter, C. and Steyaert, M.: ‘A 0.25 μm CMOS 17 GHz VCO'. IEEE ISSCC Digest Technical Papers, San Francisco, CA, USA, Feb. 2001, pp. 370–71

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  10. Lam, C. and Razavi, B.: ‘A 2.6 GHz/5.2 GHz CMOS VCO', IEEE ISSCC Digest Technical Papers, San Francisco, CA, USA, Feb. 1999, pp. 402–03

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  12. Wang, H.: ‘A 9.8 GHz back-gate tuned VCO in 0.35 μm CMOS’. IEEE ISSCC Digest Technical Papers, San Francisco, CA, USA, Feb. 1999, pp. 406–07

  13. Lee, K. and El-Gamal, M. N.: ‘A very low-voltage (0.8 V) CMOS receiver frontend for 5 GHz RF applications’. Proceedings IEEE International Symposium on Circuits and Systems (ISCAS), Arizona, USA, May 2002, pp. 125–28

  14. Samavati, H., Rategh, H. R. and Lee, T. H.: ‘A 5-GHz CMOS wireless LAN receiver front-end', IEEE Journal of Solid-State Circuits, May 2000, 35 (5), pp. 765–72

  15. Abou-Allam, E., Nisbet, E. and Maliepaard, M. C.: ‘Low-voltage 1.9 GHz front-end receiver in 0.5-μm CMOS technology', IEEE Journal of Solid-State Circuits, Oct. 2001, 36 (10), pp. 1434–43

  16. Tsang, T. K. K. and El-Gamal, M. N.: ‘A fully integrated 1 V 5.8 GHz bipolar LNA’. Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), Sydney, Australia, May 2001, pp. 843–45

  17. Hung, C. M. and Kenneth, K. O.: ‘A packaged 1.1 GHz CMOS VCO with phase noise of 126 dBc/Hz at 600-kHz offset’, IEEE Journal of Solid-State Circuits, Jan. 2000, 35 (1), pp. 100–103

  18. Pennisi, S., Scaccianoce, S. and Palmisano, G.: ‘A new design approach for variable-gain low noise amplifiers’. Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Technical Papers, Boston, MA, USA, IEEE, Jun. 2000, pp. 139–42

  19. Sacchi, E., Bietti, I., Gatta, F., Svelto, F. and Castello, R.: ‘A 2 dB NF, fully differential, variable gain, 900 MHz CMOS LNA'. Symposium on VLSI Circuits Digest of Technical Papers, Honolulu, HI, USA, IEEE, Jun. 2000, pp. 94–97

  20. Rafla, R. A. and El-Gamal, M. N.: ‘2.4–5.8 GHz CMOS LNA's using integrated inductors’. IEEE Midwest Symposium on Circuits and Systems, Lansing, MI, USA, Aug. 2000, 1, pp. 302–04

  21. Sorrapanth, T., Yue, C., Shaeffer, D., Lee, T. and Wong, S.: ‘Analysis and optimization of accumulation-mode varactor for RF ICs’. Symposium on VLSI Circuits Digest of Technical Papers, Honolulu, HI, USA, Jun. 1998, IEEE, pp. 32–33

  22. Castello, R., Erratico, P., Manzini, S. and Svelto, F.: ‘A +/ 30% tuning range varactor compatible with future scaled technologies’. Symposium on VLSI Circuits Digest of Technical Papers, Honolulu, HI, USA, IEEE, Jun. 1998, pp. 34–35

  23. Koutsoyanopoulos, Y., Papananos, Y., Bantas, S. and Alemanni, C.: ‘Performance limits of planar and multi-layer integrated inductors’. Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), Geneva, Switzerland, May 2000, pp. 160–63

  24. Niknejad, A. and Meyer, R.: ‘Analysis, design, and optimization of spiral inductors and transformers for Si RF ICs’, IEEE Journal of Solid-State Circuits, Oct. 1998, 33 (10), pp. 1470–81

  25. Mostafa, A. H., Lee, K. and El-Gamal, M. N.: ‘Characterization of CMOSP18 inductors', Technical Report, Canadian Microelectronics Corporation, Ottawa, Canada, Jan. 2001

  26. Zhang, H.: ‘High frequency parasitic modeler’, VLSI Design Project, McGill University, Sept. 2001

  27. Svelto, F., Deantoni, S. and Castello, R.: ‘A 1.3 GHz low-phase noise fully tuneable CMOS LC VCO', IEEE Journal of Solid-State Circuits, Mar. 2000, 35 (3), pp. 356–61

  28. Craninckx, J., Steyaert, M. and Miyakawa, H.: ‘A fully-integrated spiral-LC CMOS VCO set with prescaler for GSM and DCS-1800 systems’. Proceedings of Custom Integrated Circuits Conference (CICC), Santa Clara, CA, USA, IEEE, May 1997, pp. 403–06

  29. Craninckx, J. and Steyaert, M.: ‘A 1.8-GHz low-phase-noise CMOS VCO using optimized hollow spiral inductors', IEEE Journal of Solid-State Circuits, May 1997, 32 (5), pp. 736–44

  30. Rofougaran, A., Rael, J., Rofougaran, M. and Abidi, A.: ‘A 900 MHz CMOS LC-Oscillator with Quadrature Outputs'. IEEE ISSCC Digest Technical Papers, San Francisco, CA, USA, Feb. 1996, pp. 392–93

  31. De Muer, B., Itoh, N., Borremans, M. and Steyaert, M.: ‘A 1.8-GHz highlytuneablelow-phase-noiseCMOSVCO'.Proceedings of Custom Integrated Circuits Conference (CICC), Orlando, FL, USA, IEEE, Feb. 2000, pp. 585–88

  32. Mostafa, A. H. and El-Gamal, M. N.: ‘A 12.5 GHz back-gate tuned CMOS voltage controlled oscillator’. IEEE International Conference on Electronics, Circuits and Systems (ICECS), Jounieh, Lebanon, Dec. 2000

  33. Sansen, W., Steyaert, M., Peluso, V. and Peeters, E.: ‘Toward Sub 1V Analog Integrated Circuits in Submicron Standard CMOS Technologies'. IEEE ISSCC Digest Technical Papers, San Francisco, CA, USA, Feb. 1998, pp. 186–87

  34. Danesh, M., Long, J. R., Hadaway, R. A. and Harame, D. L.: ‘AQ-factor enhancement technique for MMIC inductors’, Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Technical Papers, Baltimore, MD, USA, IEEE, Jun. 1998, pp. 217–20

  35. Baltus, P. G. M., Wagemans, A. G., Dekker, R., Hoogstraate, A., Maas, H., Tombeur, A. and Van Sinderen, J.: ‘A 3.5-mW, 2.5-GHz diversity receiver and a 1.2-mW, 3.6-GHz VCO in silicon on anything’, IEEE Journal of Solid-State Circuits, Dec. 1998, 33 (12), pp. 2074–79

  36. Leeson, D. B.: ‘A simple model of feedback oscillator noise spectrum’. Proceedings of the IEEE, Feb. 1966, pp. 329–30

  37. Rudell, J. C., Ou, J.-J., Cho, T. B., Chien, G., Brianti, F., Weldon, J. A., Gray, P. R.: ‘A 1.9 GHz wide-band IF double conversion CMOS receiver for cordless telephone applications’, IEEE Journal of Solid-State Circuits, Dec. 1997, 32 (12), pp. 2071–88

  38. Copeland, M. A., Voinigescu, S. P., Marchesan, D., Popescu, P., Maliepaard, M. C.: ‘5-GHz SiGe HBT monolithic radio transceiver with tuneable filtering’. IEEE Transactions on Microwave Theory and Techniques, Feb. 2000, 48, pp. 170–81

  39. Shaeffer, D. K. and Lee, T. H.: ‘A 1.5-V, 1.5-GHz CMOS low noise amplifier’, IEEE Journal of Solid-State Circuits, May 1997, 32 (5), pp. 745–59

  40. Razavi, B.: ‘RF Microelectronics’ (Prentice Hall, 1998)

  41. Wu, S. and Razavi, B.: ‘A 900-MHz/1.8-GHz CMOS receiver for dualband applications’, IEEE Journal of Solid-State Circuits, Dec. 1998, 33 (12), pp. 2178–85




Wireless Communication Circuits and Systems
Wireless Communications Circuits and Systems (IEE Circuits, Devices and Systems Series 16)
ISBN: 0852964439
EAN: 2147483647
Year: 2004
Pages: 100
Authors: Yichuang Sun

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