7.2 HomePNA 2.0 QAM

The establishment of the HomePNA 1.0 standard was a success story for a group of industry promoters and supporters. These efforts involved laboratory testing, field verification, and compromising. Right after the confirmation of the HomePNA 1.0, the HomePNA consortium started the standardization effort of HomePNA 2.0 for a higher transmission throughput. It was the goal that the 2.0 version should be backward-compatible with the 1.0 version. Many participating companies have contributed individually or jointly. The joint technology proposal from Epigram and Lucent was selected as the base for the HomePNA 2.0 specifications. Because of its successful proposal, Epigram was subsequently bought by Broadcom. Very few knew that Epigram partially bought the idea of a telephone wiring based home network from Travetim. Travetim was a start-up founded by Pete Foley with funding from Benchmark capital. I was involved with the feasibility analysis of a high-throughput CAP (Carrierless AM/PM)-based transmission system over the existing in-house wiring for Travetim. My early analysis showed that a telephone wiring based home network transmission system had a channel capacity of about 100 Mbps and that a practical system can be implemented at 30 Mbps with the adaptive equalization technique.

Adaptive equalization technology is used to combat extensive reflections caused by many branches of in-house wiring. With the improved channel condition, HomePNA 2.0 can increase the symbol rate to 2 or 4 Mbaud, depending on a particular wiring environment within the similar frequency band of between 4 and 10 MHz. Each HomePNA 2.0 symbol is able to carry 2 to 8 bits with Quadrature Phase Shift Keying (QPSK), 8-phase Shift Keying (SK), or Quadrature Amplitude Modulation (QAM) modulation of 4 Mbaud. A Frequency Diverse QAM (FDQAM) method, where a zero is inserted between adjacent symbols, is used for 2 Mbaud. The transmission throughput of this combined higher symbol rate and higher number of bits per symbol is between 4 and 32 Mbps. A reliable transmission throughput of 10 Mbps has been observed in field tests most of the time. A HomePNA 2.0 transceiver is backward-compatible with that of HomePNA 1.0 with its build-in HomePNA 1.0 transceiver. A HomePNA 2.0 device can talk to a HomePNA 1.0 transceiver via the HomePNA 1.0 packets. HomePNA 2.0 devices can also talk to each other with a special HomePNA 2.0 packet, starting with HomePNA 1.0 synchronization symbols, such that HomePNA 1.0 transceivers can participate in the same network.

7.2.1 Summary of HomePNA 2.0 Specifications

The HomePNA 2.0 [3], [4] signaling method can also be analyzed by examining its frame structure as shown in Figure 7.10. A HomePNA 2.0 transmitter encapsulates the binary information of an Ethernet packet by adding a starter and a trailer to it. The starter consists of 16 bytes for Preamble64 and 4 bytes for Frame Control. The starter and the Destination Address (DA), Source Address (SA), and Type of an Ethernet packet combined together become the header of a HomePNA 2.0 packet. Header information is encoded with the 2-Mbaud FDQAM for a better interference tolerance. The trailer consists of 2 bytes of CRC16, variable bytes of PAD, and 1 byte of EOF (End of Frame). CRC16 and PAD are encoded with the same constellation as the preceding Ethernet Data. The EOF is also encoded with the 2-Mbaud FDQAM.

Figure 7.10. HomePNA 2.0 Frame Structure (From HomePNA specification 2.0. Copyright © 1999 HomePNA. All rights reserved.)

graphics/07fig10.gif

The PREAMBLE64 is defined as a repetition of four 16-symbol sequences. Each 16-symbol sequence is the 2-Mbaud FDQPSK encoding of the hexadecimal sequence of fc483084 or, equivalently, the binary sequence of 1111 1100 0100 1000 0011 0000 1000 0100. The 4 bytes of frame control are further divided into six fields. They are FT (Frame Type) for bits 31:24, RSVD (reserved) for bit 23, PRI (Priority) for bits 22:20, SI (Scrambler Initialization) for bits 19:16, PE (Payload Encoding) for bits 15:8, and HCS (Head Check Sequence) for bits 7:0 as shown in Figure 7.11.

Figure 7.11. Frame Control Sequence

graphics/07fig11.gif

The FT is a mechanism for providing forward compatibility, and is all zero bits for HomePNA 2.0. RSVD is set to zero by a transmitter and is ignored by a receiver. The 3-bit PRI refers to the absolute priority that a specific frame will be given when determining media access. Priority 7 has preferential access over Priority 0. SI contains the bit pattern for initializing the scrambler. PE decides the baud rate and the constellation size with 1 through 7 defining a baud rate of 2 MHz and 9 through 15 defining a baud rate of 4 MHz both with 2 to 8 bits per baud. A smaller PE number indicates a lower transmission throughput. HCS is computed as a function of the 128-bit sequence in transmission order starting with the FT bits and ending with the Ethernet SA bits, with zeros substituted for the uncomputed HCS field. The encoding is defined by

Equation 7.15

graphics/07equ15.gif


In the trailer, the CRC16 is computed as a function of the contents of the (unscrambled) Ethernet frame in transmission order, starting with the first bit of the DA field and ending with the last bit of the FCS field. The encoding is defined by

Equation 7.16

graphics/07equ16.gif


PAD is only used in conjunction with 4-MBaud modulated Ethernet packets. There is no PAD For 2-MBaud modulated payloads. The PAD field is also not present in a Compatibility Mode Frame. The last byte of the PAD specifies the number of zero PAD bytes preceding it. The length of PAD can be decided according to max(102 N, 0), where N is the number of bytes from DA to FCS, inclusive. EOF consists of the hexadecimal sequence of FC or, equivalently, the binary sequence of 11111100, encoded as 2 bits per Baud at 2 MBaud.

The scrambler generating polynomial has an order of 23 and is shown by

Equation 7.17

graphics/07equ17.gif


In a Maximum Length Shift-register (MLS) implementation, bits 15 through 18 of the shift register are initialized with a 4-bit pseudo-random number. This value is also placed in the SI field to be used by the receiver's scrambler. The scrambler is bypassed during the preamble bit field and the first 16 bits of Frame Control. The EOF sequence is not scrambled.

The incoming bits are grouped into N-bit symbols, where N is the number of bits per baud specified in the PE field. Constellation sizes range from QPSK, 8-phase SK, 16 QAM, 32 QAM, 64 QAM, 128 QAM, up to 256 QAM for 2 bits, 3 bits, 4 bits, 5 bits, 6 bits, 7 bits, and 8 bits per symbol, respectively. Symbols at 4 MBaud are transmitted at 0.707 times the amplitude of symbols at 2 MBaud. The carrier frequency for these constellations is 7 MHz. FDQAM is promoted in HomePNA 2.0 specifications as a low-complexity modulation scheme for improving the performance of uncoded QAM by a few decibels under conditions where a part of the signal spectrum is severely attenuated. FDQAM is simply QAM in which the baud rate is less than half the spectral bandwidth of the transmit filter. The 2-Mbaud FDQAM signal is generated by inserting zeros between every 2-Mbaud symbol while passing the same transmitter filter with a passband designed for the 4-Mbaud symbols. With a higher amplitude but only half of the rate, a 2-Mbaud symbol sequence produces about the same line voltage as a 4-Mbaud symbol sequence does.

A HomePNA compatibility mode is defined to transmit HomePNA 2.0 packets over an in-house wiring where HomePNA 1.0 devices also exist. Although a HomePNA 1.0 device is not able to receive HomePNA 2.0 packets in compatibility mode, it treats them as legal HomePNA 1.0 packets. The compatibility mode is based on the Compatibility Frame as shown in Figure 7.12 where an interrupted HomePNA 2.0 packet is proceeded by 8 AID symbols. Gaps are inserted into groups of symbols for the HomePNA 1.0 compatibility mode. The packet is further divided into subframes and is separated by gaps. Depending on the baud rate, each subframe consists of a non-information-bearing symbol, a zero symbol, and 1 to 35 data symbols. A gap lasts either 6 or 15 symbol periods for 2- and 4-MHz baud rates. During these gaps, there is no signal coming out of the QAM modulator.

Figure 7.12. Compatibility Frame (From HomePNA specification 2.0. Copyright © 1999 HomePNA. All rights reserved.)

graphics/07fig12.gif

In the compatibility mode, 1 non-information-bearing lead symbol is followed by 1 to 18 data symbols and 6 silent symbols for the 2-Mbaud FDQAM. To a HomePNA 1.0 receiver, a compatibility mode HomePNA 2.0 packet appears as a pulse sequence of between 4 and 12.5 µs apart. In comparison, HomePNA 1.0 data symbol pulses are approximately 3 9 µs apart while pulses of synchronization symbols are about 15 µs apart. 1 non-information-bearing lead symbol is followed by 1 to 35 data symbols and 13 silent symbols for the 4-Mbaud QAM. Similar pulse separation can also be observed by a HomePNA 1.0 receiver for the compatibility frame with 4-Mbaud modulated data.

The line voltage of HomePNA 2.0 signal is defined to be less than 15 dBVrms across a 135-ohm load and to be within 0.58 and +0.58 volt peak to peak. This line voltage limitation leads to a HomePNA PSD of less than 71.5 dBm/Hz as shown in Figure 7.13 for the frequency band of between 4 and 10 MHz. A spectrum notch of equal to or larger than 10 dB is defined between 7 and 7.3 MHz to minimize the interference to Amateur Radios.

Figure 7.13. HomePNA 2.0 PSD Mask (From HomePNA specification 2.0. Copyright © 1999 HomePNA. All rights reserved.)

graphics/07fig13.gif

Ten test loops are defined in the HomePNA 2.0 standards. Configurations for test loops 6 and 8 are shown in Figure 7.14. Loop 8 consists of all Quad cables. Corresponding insertion losses are shown in Figure 7.15. Frequency notches as deep as 45 dB are observed within the spectrum of the HomePNA 2.0 signal of between 4 and 10 MHz.

Figure 7.14. Test Loops 6 and 8

graphics/07fig14.gif

Figure 7.15. Test Loop Insertion Losses

graphics/07fig15.gif

It is interesting to note that collisions are most likely to happen at the beginning of the packet, or more accurately during the preamble part of the packet. A collision occurs because two transceivers a long distance apart cannot hear each other right away. A time delay of 0.75 µs might be experienced for two transceivers 500 ft apart. On the other hand, the preamble of eight synchronization symbols of HomePNA 1.0 lasts about 120.4 µs and the Preamble64 of HomePNA 2.0 lasts 32 µs. The time delay between the first and second pulses of synchronization symbol 0 is 14.7 µs. A HomePNA 1.0 transceiver can detect a collision of less than 500 ft away, owing to another transmission, before the second pulse of the synchronization symbol 0. A HomePNA 2.0 transceiver can examine the correctness of its transmitted Preamble64 through the hybrid to detect a collision.

7.2.2 Transceiver Structure and Performance Estimation

A HomePNA 2.0 transceiver consists of a Digital Signal Processing part, an Analog Front End (AFE), and a collision detection and Media Access and Control part as far as general task groups are concerned. A HomePNA 2.0 functional block diagram as defined by the standards is shown in Figure 7.16. We can also separate a HomePNA 2.0 transceiver into a transmit path, a receive path, and a collision detection branch.

Figure 7.16. HomePNA 2.0 Functional Blocks (From HomePNA specification 2.0. Copyright © 1999 HomePNA. All rights reserved.)

graphics/07fig16.gif

In the transmit path, groups of binary information bits are first framed, scrambled, encoded into symbols, and then modulated into passband in the DSP part of a HomePNA 2.0 transceiver. The gap insertion is required for the compatibility mode. After scrambling, bits are encoded into symbols. Depending on the transmission throughputs, between 2 to 8 bits can be encoded into each symbol. For a baud rate of 2 MHz, this corresponds to transmission throughputs of between 4 and 16 Mbps. At a 4-MHz baud rate, the transmission throughput can be as high as 32 Mbps. The hybrid circuit can provide at least 15 dB of attenuation and is necessary for collision detection. In the receive path, ADC converted samples are equalized, demodulated into symbols, decoded into a bit stream, descrambled into the original data bits, and deframed. A gap removal function is also required for compatibility mode.

The channel equalizer needs to be trained to identify proper filter coefficients for each packet because packets might come from different transceivers and, therefore, require different sets of coefficients. As is evident from the frame structure, there is no dedicated training sequence defined in the HomePNA 2.0 standards. The header, including 64 known symbols of Preamble64, 16 symbols of Frame Control, and 56 symbols of Ethernet Address/Type, can be used for equalizer training for its robust 2-Mbaud QPSK modulation. The initial 64 symbols of training on known Preamble64 symbols should provide some good initial equalizer coefficients for subsequent decision-based training of 72 additional header symbols. Once trained, different sets of equalizer coefficients can be saved for corresponding source addresses to speed up the initialization process.

Because HomePNA 2.0 is a half-duplex packet-based transmission system, the DSP process can be carried out offline in a fashion similar to that of packet data processing. Digital samples of the whole packet can be received/stored first, DSP processed, and then data processed. The four 2-Mbaud modulated symbols of EOF make it relatively easy to identify the end of a packet without equalization. For example, the digital samples corresponding to the header can be used first for equalizer training. Destination and source addresses can then be identified. All digital samples can be discarded unless the destination address is relevant. Alternatively, previously stored equalizer coefficients can be restored if packets from the same source have been received. If the packet is relevant, timing and carrier information can be accurately recovered from equalized digital samples. With correct timing and carrier information, the Ethernet packet in the rest of the digital samples can be recovered.

To have a reliable transmission without using error correction coding, the required Signal-to-Noise Ratio at the equalizer output for an even number of bits per symbol can be analyzed as follows. Assuming each signal constellation point is separated from its neighbors by a value of 2, a 4 QAM has its constellation points at (+1, +1), ( 1, +1), ( 1, 1), and (+1, 1). The average signal power is proportional to

Equation 7.18

graphics/07equ17a.gif


For 16 QAM, additional constellation points are at (+3, +1), (+3, +3), (+1, +3), ( 1, +3), ( 3, +3), ( 3, +1), ( 3, 1), ( 3, 3), ( 1, 3), (+1, 3), (+3, 3), and (+3, 1). The average signal power is proportional to

Equation 7.19

graphics/07equ18.gif


In general, the average power of a square constellation can be expressed by

Equation 7.20

graphics/07equ19.gif


where n is the number of bits the constellation can carry. n = 2 for 4 QAM, n = 4 for 16 QAM, n = 6 for 64 QAM, and n = 8 for 256 QAM. On the other hand, an error occurs when the addition of noise causes the result signal (signal plus noise) to fall into the region of the adjacent constellation point. This means the magnitude of noise exceeds 1 in either the x or y direction. Therefore, the probability of error can be expressed by

Equation 7.21

graphics/07equ20.gif


where s is the noise power and graphics/07inl04.gif is the noise power in each of x and y directions. By replacing variable x with graphics/07inl05.gif, Equation 7.21 can also be expressed as

Equation 7.22

graphics/07equ21.gif


We notice that graphics/07inl06.gif for the 4 QAM constellation. The ratio of SNRs of a general square constellation to the 4 QAM is (2n 1)/3. Therefore, the probability of error can be related to the SNR of a particular constellation by

Equation 7.23

graphics/07equ22.gif


where n is the number of bits each symbol can carry. This expression in general also applies to constellations encoded with an odd number of bits. The required SNR for a 4 QAM constellation at an error rate of 1 x 10-7 is about 14.6 dB. Using the scaling factor of 3/(2n 1), we can infer that the required SNR is about 33.9 dB for a 256 QAM constellation also at an error rate of 1 x 10-7. Table 7.2 shows scaling factors, in terms of dB, relating the 4 QAM to other constellation sizes. Table 7.3 shows typical desired probabilities of errors for the 4 QAM constellation and corresponding SNR. With these two tables, the required SNR at a particular error rate can be estimated for the majority of popular constellation sizes.

Table 7.2. Constellation Scaling

QAM Size

Bits/Symbol

Adjustment (dB)

4

2

0

8

3

3.68

16

4

6.99

32

5

10.14

64

6

13.22

128

7

16.27

256

8

19.29

Table 7.3. Pe and SNR for 4 QAM

Pe

SNR (dB)

Pe

SNR (dB)

1x10 1

4.35

1x10 6

13.80

1x10 2

8.23

1x10 7

14.53

1x10 3

10.34

1x10 8

15.17

1x10 4

11.82

1x10 9

15.73

1x10 5

12.91

1x10 10

16.22

Each constellation point can be described by a complex number or a pair of numbers for scales on the x and y axes. The scale on the x axis is the real part of the complex number and the scale on the y axis is the imaginary part. A symbol is modulated into passband through the multiplication of this pair of numbers with cosine and sine functions of the carrier frequency. Before multiplying, each component of the symbol is usually sent through a shaping filter separately to control the shape of the PSD. The modulation signal flow can be represented by Figure 7.17.

Figure 7.17. Modulation Process (From HomePNA specification 2.0. Copyright © 1999 HomePNA. All rights reserved.)

graphics/07fig17.gif

The shaping, upsampling low-pass filter converts the baud rate to the sampling rate and is usually designed according to the square-root Nyquist function. Coefficient values of a square-root Nyquist shaping filter can be described by

Equation 7.24

graphics/07equ23.gif


where a controls the excessive bandwidth (i.e., the slope of the band edge) and n is the upsampling rate. For a symbol rate of 2 MHz and a shaping filter sampling rate of 24 MHz, the upsampling rate is n = 12. There is one discontinuity at k = 0. The value at k = 0 is calculated using

Equation 7.25

graphics/07equ24.gif


Values at other possible discontinuities can be interpreted, for example, as the average of adjacent points. Figure 7.18 shows filter coefficients of an example squared-root Nyquist filter with an up sampling rate of 10. Figure 7.19 shows corresponding frequency response assuming a baud rate of 4 MHz.

Figure 7.18. Coefficients of a Shaping Filter

graphics/07fig18.gif

Figure 7.19. Frequency Response of the Shaping Filter

graphics/07fig19.gif

Spectrum-shaping filters consist of a notch filter for reducing the PSD within the 7- to 7.3-MHz Amateur Radio band and an analog aliasing suppression bandpass filter for meeting the out-of-band PSD mask of the 140-dBm/Hz requirement.

The theoretical performance of a HomePNA 2.0 transceiver under these test loop conditions as defined by the standards can be analyzed by comparing the received signal PSD against a background noise of 140 dBm/Hz. Figure 7.20 shows receiver front-end SNRs for test loops 6 and 8 based on a transmit PSD of 72 dBm/Hz.

Figure 7.20. Receiver Front-End SNRs

graphics/07fig20.gif

Based on these receiver front-end SNRs, the channel capacities for the HomePNA 2.0 transmission environment are found to be between 87.8 and 98.3 Mbps based on test loops #8 and #6, respectively, using

Equation 7.26

graphics/07equ26.gif


At about 90 Mbps, the channel capacity is about nine times the nominal 10 Mbps throughput of HomePNA 2.0.

A MATLAB file for the implementation of HomePNA 2.0 transceiver is attached at the end of this chapter.

7.2.3 HomePNA 2.0 Priority and MII

Under the compatibility mode, all HomePNA 2.0 transceivers can send packets conforming to the compatibility frame to each other and exchange HomePNA 1.0 packets with HomePNA 1.0 transceivers based on the basic 802.3 MAC protocol recommended by the HomePNA 1.0 specifications. On the other hand, there are eight priority levels defined for a HomePNA 2.0 transceiver only environment. Different priority levels are distinguished by the number of time slots a transceiver has to wait before attempting transmission after sensing a quiet medium. There are eight time slots, which are defined as shown in Figure 7.21. The highest priority level is priority 7, and the lowest is priority 0. A transceiver with priority 7 can attempt to transmit right after the IFG (InterFrame Gap), while the one with the lowest priority must wait for an additional seven time slots, each of which lasts 21 µs. High priority levels can be assigned to timing-sensitive packets, such as those of video or audio, such that random data packets with lower priorities would not interrupt timing-critical applications.

Figure 7.21. Time Slots for Priorities (From HomePNA specification 2.0. Copyright © 1999 HomePNA. All rights reserved.)

graphics/07fig21.gif

With the help of a good hybrid circuit, a HomePNA 2.0 transceiver is expected to detect a collision of its own packet with another one of up to 36 dB lower signal level from a distant transceiver. After a collision is detected, the transceiver terminates the packet with an EOF right after the Ethertype field. Thus a collided packet lasts about 70 µs while a valid packet lasts at least 92.5 µs. For a HomePNA 2.0 transceiver without the priority capability, the waiting time after sensing a quiet medium is set to the equivalent of priority 2. The basic 802.3 MAC protocol requires a counter for the collision resolution procedure to decide when to resend the same packet. Eight collision resolution counters are required for the HomePNA 2.0 priority protocol. The priority level of a collision can be inferred from the priority slot where the collision occurs. The corresponding counter can then be used properly.

The physical layer and the MAC layer of a HomePNA 2.0 transceiver can be implemented separately. In fact, the Ethernet MII can be utilized to separate the HomePNA 2.0 physical layer from the MAC layer. A 802.3 MAC chip with an MII can be used in conjunction with a HomePNA 2.0 physical layer chip to build a HomePNA 2.0 transceiver. Because only two fixed clock rates are specified for 10- and 100-Mbps versions of Ethernet and the transfer rate of HomePNA 2.0 can be higher than 10 Mbps while lower than 100 Mbps, an innovative way of using the CRS is necessary to utilize the 25-MHz clock. When transmitting, the HomePNA 2.0 physical layer asserts CRS some time after TX_EN comes true but drops CRS after TX_EN becomes false and when the physical layer is ready to receive another packet from the MAC. Only after CRS falls will the MAC assert TX_EN after a time out of 0.96 µs if there is another packet to send. The MAC can thus be held back to match the physical layer's transmission speed. On the other hand, the COL (collision detection) signal is not used by a HomePNA 2.0 physical layer. In other words, the collision resolution procedure can be implemented in the HomePNA 2.0 physical layer chip.

Just like the HomePNA 1.0, no management interface is required for a HomePNA 2.0 physical layer with an MII.



Home Network Basis(c) Transmission Environments and Wired/Wireless Protocols
Home Networking Basis: Transmission Environments and Wired/Wireless Protocols
ISBN: 0130165115
EAN: 2147483647
Year: 2006
Pages: 97

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