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32/64-Bit 80x86 Assembly Language Architecture
32/64-Bit 80x86 Assembly Language Architecture
ISBN: 1598220020
EAN: 2147483647
Year: 2003
Pages: 191
Authors:
James Leiterman
BUY ON AMAZON
Back Cover
Back Cover
About
Preface --(or, So Why Did He Write Yet Another Book?)
Chapter 1: Introduction
Conventions Used in This Book
Chapter 2: Coding Standards
Constants
Data Alignment
Stacks and Vectors
Compiler Data
Assertions
Memory Systems
Exercises
Chapter 3: Processor Differential Insight
Processor Overview
History
The 64-Bit Processor
80x86 Registers
CPU Status Registers (EFLAGS64-Bit RFLAGS)
NOP -- No Operation
Floating-Point 101
Processor Data Type Encoding
EMMS -- EnterLeave MMX State
FEMMS -- EnterLeave MMX State
DestinationSource Orientations
BigLittle-Endian
Alignment Quickie
(Un)aligned Memory Access
System Level Functionality
Indirect Memory Addressing
Translation Table
String Instructions
Special (Non-Temporal) Memory Instructions
Exercises
Chapter 4: Bit Mangling
Boolean Logical AND
Boolean Logical OR
Boolean Logical XOR (Exclusive OR)
Boolean Logical ANDC
Exercises
Chapter 5: Bit Wrangling
Logical Left Shifting
Logical Right Shifting
Arithmetic Right Shifting
Rotate Left (or n-Right)
Rotate Right
Bit Scanning
Exercises
Chapter 6: Data Conversion
Byte Swapping
Data Interlacing
Swizzle, Shuffle, and Splat
Data Bit Expansion
Data Bit Reduction (with Saturation)
Data Conversion (Integer : Float, Float : Integer, Float : Float)
Exercises
Chapter 7: Integer Math
General Integer Math
Packed Addition and Subtraction
Vector Addition and Subtraction (Fixed Point)
Averages
Sum of Absolute Differences
Integer Multiplication
Packed Integer Multiplication
Integer Division
Exercises
Chapter 8: Floating-Point Anyone?
The Floating-Point Number
LoadingStoring Numbers and the FPU Stack
General Math Instructions
Advanced Math Instructions
Floating-Point Comparison
FPU BCD (Binary-Coded Decimal)
FPU Trigonometry
FPU System Instructions
Validating (Invalid) Floating-Point
Exercises
Chapter 9: Comparison
TEST -- Logical Compare A B
Indexed Bit Testing
SETcc -- Set Byte on Condition
Comparing Operands and Setting EFLAGS
CMP -- Packed Comparison
Extract Packed Sign Masks
SCASSCASBSCASWSCASDSCASQ -- Scan String
CMOVcc -- Conditional Move
CMPXCHG -- Compare and Exchange
Boolean Operations upon Floating-Point Numbers
Min -- Minimum
Max -- Maximum
Chapter 10: Branching
Jump Unconditionally
Jump Conditionally
Branch Prediction
PAUSE -- (Spin Loop Hint)
Pancake Memory LIFO Queue
Stack
CALL Procedure (Function)
Calling Conventions (Stack Argument Methods)
Interrupt Handling
Chapter 11: Branchless
Function yABS(x) Absolute D A
Function yMIN(p, q) Minimum
Function yMAX(p, q) Maximum
Chapter 12: Floating-Point Vector Addition and Subtraction
Floating-Point Vector Addition and Subtraction
Vector Scalar Addition and Subtraction
Special -- FP Vector Addition and Subtraction
Exercises
Chapter 13: FP Vector Multiplication and Division
Floating-Point Multiplication
Vector Scalar Multiplication
Vector Floating-Point Division
Exercises
Chapter 14: Floating-Point Deux
SQRT -- Square Root
Vector Normalize
Chapter 15: Binary-Coded Decimal (BCD)
BCD
Graphics 101
Chapter 16: What CPUID?
CPUID
PIII Serial License
Sample CPU Detection Code
Chapter 17: PC IO
IN -- Input from Port
OUT -- Output to Port
INSx -- Input from Port to String
OUTSx -- Output String to Port
Chapter 18: System
System Timing Instructions
Cache Manipulation
System Instructions
Hyperthreading Instructions
Chapter 19: Gfx R Asm
Setting Memory
Copying Memory
Speed Freak
Graphics 101 -- Frame Buffer
Graphics 101 -- Blit
Graphics 101 -- Blit (MMX)
Graphics 101 -- Clipping Blit
Chapter 20: MASM vs. NASM vs. TASM vs. WASM
MASM -- Microsoft Macro Assembler
Compiler Intrinsics
Chapter 21: Debugging Functions
Guidelines of Assembly Development
Visual C
Tuning and Optimization
Exception Handling -- AKA: Dang that 1.QNAN
Print Output
Test Jigs
Chapter 22: Epilogue
Appendix A: Data Structure Definitions
Appendix B: Mnemonics
Mnemonics Part 2
Mnemonics Part 3
Mnemonics Part 4
Mnemonics Part 5
Mnemonics Part 6
Appendix C: RegMem Mapping
Glossary
A
B
C
D
E
F
G
I
J
L
M
N
O
P
Q
R
S
T
V
W
X
Z
Alignment Macros
Algebraic Laws Used in This Book
References
List of Figures
List of Tables
List of Listings
32/64-Bit 80x86 Assembly Language Architecture
ISBN: 1598220020
EAN: 2147483647
Year: 2003
Pages: 191
Authors:
James Leiterman
BUY ON AMAZON
High-Speed Signal Propagation[c] Advanced Black Magic
Impedance of Linear, Time-Invariant, Lumped-Element Circuits
Power Ratios
Scaling Copper Transmission Media
Effect of Inadequate Sampling Rate
Signal Integrity Simulation Process
Lotus Notes and Domino 6 Development (2nd Edition)
New Language Features
Creating a View
Launching the Frameset
Getting Session and User Information
Real-World LotusScript Examples
A+ Fast Pass
Domain 3 Preventive Maintenance
Domain 4 Motherboard/Processors/Memory
Domain 5 Printers
Domain 2 Installation, Configuration, and Upgrading
Domain 3 Diagnosing and Troubleshooting
Postfix: The Definitive Guide
Unix Topics
Queue Tools
Local Mail Transfer Protocol
Strict Syntax Parameters
MySQL
Mapping Hacks: Tips & Tools for Electronic Cartography
Hacks 14-21
Hack 41. Plot Points on an Interactive Map Using DHTML
Hack 79. Geocode a U.S. Street Address
Hack 82. Find Nearby Things Using U.S. ZIP Codes
Hack 90. Crawl the Geospatial Web with RedSpider
Cisco ASA: All-in-One Firewall, IPS, and VPN Adaptive Security Appliance
Domain Name System
Failover Configuration
Advanced WebVPN Features
Introduction to ASDM
AAA
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