Preface

This book will assist both computer professionals and college-level learners to comprehend the specific capabilities of the 64bit Intel^® Itanium^® architecture, within the wider context of contemporary architectural principles. This is accomplished through a guided investigation of Itanium assembly language, using standard command-line tools and illustrative programs.

The Itanium architecture is distinct from previously available architectures. This explicitly parallel instruction set computer (EPIC) viably introduces a versatile register stack and thorough use of predication. The stature of its two developers (Hewlett-Packard^® and Intel) positions the new architecture to win widespread acceptance from technical and financial decision-makers.

Design and development of processor architectures is very expensive. Announced consolidations in the industry have pointed to the phase-out of server and graphical scientific workstation lines based upon three 64bit RISC designs (Alpha^™, MIPS^®, and PARISC^®) that have supported Unix^® or Linux^® operating systems; those platforms are to be superseded by new product lines based upon Itanium processors.

Except for the briefly marketed 64bit version of Windows NT^® for Alpha-based systems, Microsoft^® had not promoted 64bit development for servers. Moreover, Intel had not marketed a commercial 64-bit platform prior to the Itanium processors. Moore's law implies that a switchover from 32- to 64-bit addressing in the much larger consumer and commercial desktop market is inevitable; indeed, one can install a gigabyte of physical RAM into a high-end notebook computer, thereby using one-quarter of the 32-bit addressing capability.

This book is the second in a line of works to discuss computer architecture and assembly language programming for modern 64bit processors. We have chosen the Itanium architecture because it represents a thoroughly new approach, and because we anticipate that it will attain wide commercial and educational adoption. In fact, the Itanium processor line should thrive as a platform for Microsoft operating systems, Hewlett-Packard's HPUX^® implementation of Unix, numerous Linux distributions, and even ports of FreeBSD and OpenVMS^™.

In writing this book, we have brought forward the collective teaching and practical experience from several preceding works:

Eckhouse, Richard H. and L. Robert Morris, Minicomputer Systems: Organization, Programming, and Applications (PDP-11). Englewood Cliffs, N.J.: Prentice Hall, Inc., 1979.

Levy, Henry M. and Richard H. Eckhouse, Computer Programming and Architecture: The VAX, 2nd ed. Bedford, Mass.: Digital Press, 1989.

Evans, James S. and Richard H. Eckhouse, Alpha RISC Architecture for Programmers. Upper Saddle River, N.J.: Prentice Hall PTR, 1999.

These prior books built a tradition of discussing the general principles of computer architecture through a pedagogically tested experience in register-level analysis and programming, using one specific contemporary architecture each time. In this new book, we continue that tradition by focusing on the Itanium architecture, contrasting it with other designs as appropriate.

We envision a diverse readership for this book. Computer professionals, especially those who want to gain familiarity with 64bit systems, can use it for individual study and reference. Undergraduate or graduate classes in computer architecture and/or assembly language can use it as the primary text, or advanced classes in computer science may use it as a supplement. We have striven to keep both our discussions and many of the suggested exercises to a degree of transparency that can be worked through with pencil and paper, for we feel that a mature understanding of the complex or the subtle is best built on a foundation of confidence in the simple.

Our book is about the design and capabilities of the Itanium architecture from the programmer's perspective. Hands-on exposure to command-line programming environments is recommended and illustrated to make sample programs come alive for the reader. Therefore we also describe how to work within standard command-line programming environments, principally HPUX and Linux.

In a course on computer architecture at Lawrence University, we introduce the first simple programming illustrations early in a ten-week term. Additional brief demonstration programs are presented as illustrations during subsequent class meetings, and student assignments frequently involve adaptations and extensions of such models.

These illustrative programs are available as source text on the Web site associated with this book, http://www.viika.com/itanium/. As well as being compatible with the HPUX and Linux programming environments on Itanium workstations or servers, most of these programs can also be explored using Hewlett-Packard's Ski simulator for Itanium architecture, a free download for 32bit Linux systems as mentioned in Appendix B in this book.

Increasingly powerful techniques for input and output are introduced throughout the text, beginning with simple debugging techniques and continuing with the use of sequential files for input and output. A symbolic debugger is introduced and illustrated as a versatile tool for routine use.

The chapters of this book contain more material than some instructors may be able to present in their courses, particularly if comparisons among multiple architectures or concepts of hardware organization are also studied. Chapter 8, on floating-point operations, may be omitted without loss of continuity, although it is helpful as background for working through Chapter 11.

We know that some would prefer to put a thorough treatment of procedure calls at an earlier point than we do, but this may be chiefly in order to accomplish input/output. We prefer to use a debugger at first (Chapters 3 6), and introduce procedure calls based on high-level language library routines at the end of Chapter 6. We describe details of procedure-calling mechanisms more fully in Chapter 7, after much of the Itanium instruction set and many fundamental topics e.g., addressing modes, stacks, and predication have been discussed. Later, we continue to develop the principles of register-level programming through examples drawing upon some of the functions that the C language supplies for input and output.

We have found that exploring machine code produced by high-level language compilers proves to be remarkably illuminating. Indeed, it is surprising how much overhead may be required by the incorporation of a high degree of proceduralization in programs. Such "Eureka!" experiences become rewards for comprehending assembly language and computer architecture.

Chapters 10 and 11 comprise an introductory unit on optimization techniques, first with a focus on the intrinsic capabilities of the architecture, and then with observations of output from high-level language compilers. We use the techniques of an experimentalist more than the perspective of a theorist when dealing with performance-related concerns. These two chapters represent a distinctive feature of this book.

The final chapters take up additional topics related to Itanium architecture, including "parallel" instructions that can accelerate calculations with data less than 64 bits in width, the provision for executing applications using 32bit Intel instructions, and an overview of extensions added to computer architectures in later implementations.

Each chapter includes a list of related references, both print and electronic, with the caveat that electronic resources, by their very nature, may vanish without warning.

Exercises vary widely in type (numeric, essay, programming) and degree of difficulty. Answers or hints for many of them are provided at the back of the book.

Several appendices contain material that is useful for setting up a computer system to utilize the programs in the book, reference material on numerous features of the Itanium architecture, a treatment of the macro capabilities of the GNU assembler for Linux, and an introduction to inline assembly.