Chapter 6

A1:

Consider mov instructions (or pseudo-ops), as well as the special effects attainable with some of the arithmetic instructions. If either A or B is irrelevant to calculating the function value, it would not have to be an operand of the instruction.

A2:

and, 0x12345670; or, 0x9abcdef8; xor, 0x88888888; andcm, 0x00000008.

A3:

Consult the information in Table 6-1.

A4:

Interchange.

A5:

a. 0 if bit <7> of immediate operand is 0, otherwise unchanged from register contents; b. unchanged from register contents; c. 0 if bit <7> of immediate operand is 0, otherwise complemented from register contents; d. unchanged.

A7:

Put the first xor instruction and the cmp instruction in a first group and the remaining instructions in a second group.

A9:

What you want is some instruction sequence that will perform a desired modulo operation, such as 3 (2 x (3/2) = 1. Is there an easier way using just one instruction? Hint: look at bit patterns.

A11:

Use sequences that involve extract and/or deposit instructions.

A12:

You might consider such instruction types as: a. and, tbit, and cmp; b. and, shr.u, and shl.

A13:

Track the address of the running maximum. After the loop, subtract the address of the origin of the array from the address of the maximum and then shift to compute the index position.

A15:

The ASCII output is essentially a sign and magnitude representation. Perhaps you could determine the sign of the number early in your program, then convert to magnitude and continue as in the DECNUM program.

A17:

The first character, in this case a carriage return, is "printed" by the IO_C program and followed by a newline. In this case, the carriage return itself is echoed as a newline also.

A18:

The sensible place to look is register r8.

A19:

How will instructions where LEN is used as an assembly-time constant be encoded?

A23:

You can intermix string, stringz, and data1 assembly directives in a data segment.



ItaniumR Architecture for Programmers. Understanding 64-Bit Processors and EPIC Principles
ItaniumR Architecture for Programmers. Understanding 64-Bit Processors and EPIC Principles
ISBN: N/A
EAN: N/A
Year: 2003
Pages: 223

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